ASPE 2012 Summer Topical Meeting

Precision Engineering and Mechatronics Supporting the Semiconductor Industry
Lawrence Berkeley National Laboratory
Berkeley, California
June 24-26, 2012

Meeting Co-Chairmen
John S. Taylor

Lawrence Livermore National Laboratory
Jan van Eijk

Delft University of Technology

Schedule * Sessions * Tutorial * Dinner * Directions & Transportation * Committee

This topical meeting is a second version of the highly successful meeting held in Spring 2008 Precision Mechanical Design and Mechatronics for Sub-50nm Semiconductor Equipment (Proceedings can be viewed at

The meeting venue will again be Lawrence Berkeley National Laboratory, where Senajith (Seno) Rekawa and his wonderful staff have facilitated a majestic auditorium very conducive to an interactive atmosphere between the speaker and the audience. Berkeley Lab is a multidisciplinary national laboratory located on a hillside directly above the campus of the University of California at Berkeley.

The semiconductor equipment industry is presently facing a number of interesting challenges. At the same time they are faced with continuous “shrink and growth”. The Critical Dimensions will go below 25 nm while the size of the silicon wafer will grow to 450 mm diameter.

The smaller CD cannot be imaged with regular optical systems and thus the search and development of alternative approaches must be taken up. The following list gives an impression of the potential roads to smaller CD’s:

  1. Double Patterning Immersion Lithography
  2. Extreme Ultraviolet Lithography (EUVL)
  3. Massive Parallel E-beam, Maskless Lithography
  4. Nano-Imprint Lithography

The challenges are not only in the field of imaging but will also influence inspection and metrology equipment.

At the same time, the transition to 450 mm wafers will influence all equipment suppliers. As many elements will have to be redesigned for this transition this is the moment where companies can revisit the architecture for their equipment. The next generation 450 mm tools will have to be capable for the CD level of the future, more productive and be the most cost effective.

Clearly this is a very challenging time for System Engineers involved in the creation of the future products for their companies. This topical meeting offers them a platform to exchange results of research results, to hear about developments in component technologies and to broaden their view on the wealth of system concepts that might be used.

The general intent is to bring together engineers and scientists from the semiconductor industry with members of the American Society for Precision Engineering.  These groups partly overlap, but in many other cases, there is a novel opportunity to share advances, challenges, and seek mutual solutions in attaining high levels of precision in manufacturing.

The objective of this meeting is to enable a technical dialogue between engineers directly supporting the semiconductor industry and the broader field of precision engineering.  The focus of this meeting will be on issues regarding precision mechanics and control, recognizing that detailed issues of lithographic processing, such as resist development, are well-represented in other venues.  The intended semiconductor technology audience includes current lithographic tool makers, and also related technology developers, such as in mask writing, opto-mechanics, and future technologies such as EUV, maskless, and nano-imprint lithographies.  Following is a list of paper topics and general discussion:

  • CD and overlay error budgets
  • Motion control and synchronization in step-and-scan lithography
  • Actuator and sensor innovations
  • Motion control requirements for nano-imprint, maskless, and other new processes
  • Stage design and control for high-g and high throughput requirements
  • Design and testing of advanced rotational degrees of freedom
  • Thermal management
  • Precision engineering in clean and/or vacuum environments
  • Reticle and wafer chucking
  • Sensors for alignment and active motion control
  • Advanced motion control
  • System qualification and reliability
  • Qualification of ultra-precision stages and the application of Standards
  • Fixturing of optical components
  • Measurement and control of vibration and settling time
  • Active and passive strategies for damping
  • Metrology and diagnostics of errors
  • Alignment strategies, e.g. for the mask stage, wafer stage, imaging optics
  • Synergistic areas of microfabrication, grating manufacture, LIGA
  • Equipment design for 450 mm wafers

A full-day tutorial on Sunday, June 24 will give participants the opportunity to become acquainted with both fundamentals and recent developments in the field of semiconductor equipment. The focus will be on system dynamics and the influence of key sources of error, including thermal loading and floor vibrations.  The tutorial will be an excellent learning experience for precision and semiconductor engineers.  Please see the separate abstract.>>

The 2012 Summer Topical Meeting will span 2 days with technical presentations, with time allocated for professional networking and brief commercial presentations and general announcements.  We have reserved blocks of rooms at local hotels, and have planned a reception as well as an enjoyable dinner at a local venue.  Please refer to this website for more details.